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Robust real-time pedestrian detection on embedded devices

Detection of pedestrians on embedded devices, such as those on-board of robots and drones, has many applications including road intersection monitoring, security, crowd monitoring and surveillance, to name a few. However, the problem can be challenging due to continuously-changing camera viewpoint and varying object appearances as well as the need for lightweight algorithms suitable for embedded

Artificial Intelligence

Demonstration of Forward Collision Warning System Based on Real-Time Computer Vision

This paper demonstrates the software and hardware of a forward-collision warning system using techniques of realtime computer vision which helps self-driving cars and autonomous vehicles systems to merge with the road environment safely and ensure the reliability of these systems. The software approach of the paper consists of five parts: car detection, depth estimation, lane assignation, the

Software and Communications

Inverse memrsitor emulator active Realizations

The paper aims to propose three different inverse memristor emulators based on serveral active blocks. One of the presented emulator realizes employing second generation current conveyor (CCII) andcanalog voltage multiplier with passive elements. The other two introduced emulators are designed using cureent feedback operational amplifier (CFOA) with two switches or two BJT transistor. One of the

Circuit Theory and Applications
Software and Communications

Identifying the Parameters of Cole Impedance Model Using Magnitude Only and Complex Impedance Measurements: A Metaheuristic Optimization Approach

Due to the good correlation between the physiological and pathological conditions of fruits and vegetables and their equivalent Cole impedance model parameters, an accurate and reliable technique for their identification is sought by many researchers since the introduction of the model in early 1940s. The nonlinear least squares (NLS) and its variants are examples of the conventional optimization

Circuit Theory and Applications

Design and Implementation of an Optimized Artificial Human Eardrum Model

This paper introduces a fractional-order eardrum Type-II model, which is derived using fractional calculus to reduce the number of elements compared to its integer-order counterpart. The proposed fractional-order model parameters are extracted and compared using five meta-heuristic optimization techniques. The CMOS implementation of the model is performed using the Design Kit of the Austria Mikro

Circuit Theory and Applications

Generic FPGA Design of Spiking Neuron Model

This paper introduces a new representation of the human brain neuron cell response. Implementation of a single cell model of an excitatory and inhibitory neuron. The architecture is based on mimic the real reaction of the neuron cell. Excitatory and inhibitory are implemented in generic form for all neuron's behavior. The design is tested experimentally using FPGA. The designs have been realized

Circuit Theory and Applications

Quantum Networking, where it is headed

It is an undeniable fact that computer science has gone a long way, from the invention of transistor-based electronic computers to the rise of artificial intelligence and quantum computing. Now that we are looking at the quantum horizon, the last piece that would complete the quantum revolution is quantum networking. © 2020 IEEE.

Artificial Intelligence

Deep convolutional neural network based autonomous drone navigation

This paper presents a novel approach for aerial drone autonomous navigation along predetermined paths using only visual input form an onboard camera and without reliance on a Global Positioning System (GPS). It is based on using a deep Convolutional Neural Network (CNN) combined with a regressor to output the drone steering commands. Furthermore, multiple auxiliary navigation paths that form a â€n

Artificial Intelligence

5G and Satellite Network Convergence: Survey for Opportunities, Challenges and Enabler Technologies

Development of 5G system as a global telecommunication infrastructure is accelerating to realize the concept of a unified network infrastructure incorporating all access technologies. The potential of Low Earth Orbit (LEO) constellation systems has emerged to support wide range of services. This could help to achieve 5G key service requirements for enhanced Mobile Broadband (eMBB), Massive Machine

Artificial Intelligence

Low Power Scalable Ternary Hybrid Full Adder Realization

Multi-level electronic systems offer speed and area simplicity, reducing the complexity of implementation and power dissipation. In this paper, a Hybrid ternary Full Adder (FA) is proposed using Conventional Complementary Metal Oxide Semiconductor (CCMOS), Double Pass-transistor Logic (DPL), and Pass Transistors (PT). The proposed FA is extended up to 64-bits to test scalability. To validate the

Circuit Theory and Applications